This study presents a breakthrough in the hardware implementation of energy-efficient all-spin synapse and neuron devices for highly scalable integrated neuromorphic circuits. The researchers demonstrate the successful execution of all-spin synapse and activation function generator using domain wall-magnetic tunnel junctions (DW-MTJs). By leveraging the synergistic effects of spin-orbit torque and interfacial Dzyaloshinskii-Moriya interaction in selectively etched spin-orbit coupling layers, they achieve a programmable multi-state synaptic device with high reliability. First-principles calculations confirm that the reduced atomic distance between 5d and 3d atoms enhances Dzyaloshinskii-Moriya interaction, leading to stable domain wall pinning. Experimental results, supported by visualizing energy landscapes and theoretical simulations, validate the proposed mechanism. A spin-neuron with a sigmoidal activation function is demonstrated, enabling high operation frequency up to 20 MHz and low energy consumption of 508 fJ/operation. A neuron circuit design with a compact sigmoidal cell area and low power consumption is also presented, along with corroborated experimental implementation. The findings highlight the great potential of domain wall-magnetic tunnel junctions in the development of all-spin neuromorphic computing hardware, offering exciting possibilities for energy-efficient and scalable neural network architectures. The study also explores the implementation of spin-synapses based on DW-MTJs with tailored iDMI and spin-neuron realization in the form of sigmoidal activation function generators. The results show that the DW-pMTJ-based all-spin synaptic and sigmoidal neuron prototype shows great potential in energy-efficient neuromorphic hardware development with high performance in a standard CMOS-process-technology-compatible way. The study demonstrates the feasibility of constructing a sigmoidal spin-neuron using the same scheme as that of a synaptic device experimentally. By further complementary micro-magnetic and circuit-level co-simulation, a sigmoid activation function generator has been successfully demonstrated based on a DW-pMTJ driven by synergistic SOT and iDMI with an energy consumption of 36.3 fJ/pulse. The study also presents a neuron circuit design with a compact sigmoidal cell area and low power consumption, along with corroborated experimental implementation. The overall energy consumption is less than 508 fJ/operation including the reset process with a competitive firing rate up to 20 MHz. The developed devices are compatible with the current standard CMOS technology and the magnetoresistive random-access memory process, without any exotic material, complicated structure, and extra masks in comparison with the state-of-the-art, offering a promising and applicable candidate for neuromorphic devices and chips application in new trajectories with a device-circuit perspective and the envision design of all-spin neuron circuits.This study presents a breakthrough in the hardware implementation of energy-efficient all-spin synapse and neuron devices for highly scalable integrated neuromorphic circuits. The researchers demonstrate the successful execution of all-spin synapse and activation function generator using domain wall-magnetic tunnel junctions (DW-MTJs). By leveraging the synergistic effects of spin-orbit torque and interfacial Dzyaloshinskii-Moriya interaction in selectively etched spin-orbit coupling layers, they achieve a programmable multi-state synaptic device with high reliability. First-principles calculations confirm that the reduced atomic distance between 5d and 3d atoms enhances Dzyaloshinskii-Moriya interaction, leading to stable domain wall pinning. Experimental results, supported by visualizing energy landscapes and theoretical simulations, validate the proposed mechanism. A spin-neuron with a sigmoidal activation function is demonstrated, enabling high operation frequency up to 20 MHz and low energy consumption of 508 fJ/operation. A neuron circuit design with a compact sigmoidal cell area and low power consumption is also presented, along with corroborated experimental implementation. The findings highlight the great potential of domain wall-magnetic tunnel junctions in the development of all-spin neuromorphic computing hardware, offering exciting possibilities for energy-efficient and scalable neural network architectures. The study also explores the implementation of spin-synapses based on DW-MTJs with tailored iDMI and spin-neuron realization in the form of sigmoidal activation function generators. The results show that the DW-pMTJ-based all-spin synaptic and sigmoidal neuron prototype shows great potential in energy-efficient neuromorphic hardware development with high performance in a standard CMOS-process-technology-compatible way. The study demonstrates the feasibility of constructing a sigmoidal spin-neuron using the same scheme as that of a synaptic device experimentally. By further complementary micro-magnetic and circuit-level co-simulation, a sigmoid activation function generator has been successfully demonstrated based on a DW-pMTJ driven by synergistic SOT and iDMI with an energy consumption of 36.3 fJ/pulse. The study also presents a neuron circuit design with a compact sigmoidal cell area and low power consumption, along with corroborated experimental implementation. The overall energy consumption is less than 508 fJ/operation including the reset process with a competitive firing rate up to 20 MHz. The developed devices are compatible with the current standard CMOS technology and the magnetoresistive random-access memory process, without any exotic material, complicated structure, and extra masks in comparison with the state-of-the-art, offering a promising and applicable candidate for neuromorphic devices and chips application in new trajectories with a device-circuit perspective and the envision design of all-spin neuron circuits.