A 1.5V, 1.5GHz CMOS low noise amplifier (LNA) for a GPS receiver has been implemented in a 0.6 μm CMOS process. The LNA achieves a forward gain of 22dB with a noise figure of 3.5dB while drawing 30mW from a 1.5V supply. This represents the lowest noise figure reported for a CMOS amplifier operating above 1GHz. The design aims to minimize noise figure while maintaining reasonable power consumption. The input impedance is adjusted using inductive source degeneration and input tuning to achieve a narrow-band 50Ω impedance. The noise figure is calculated using an equivalent circuit model, considering contributions from various noise sources, including channel thermal noise. The noise figure is found to be independent of the intrinsic device transconductance, g_m1. The output noise current is influenced by the channel thermal noise, with the noise figure improving as the input device size is minimized. However, reducing g_d0 (zero-bias drain conductance) can degrade LNA linearity. Experimental results show a measured gain of 22dB and noise figure of 3.5dB at 30mW power dissipation. Spice simulations predict a noise figure of 1.7dB, implying a γ value of approximately 2.6. The amplifier also exhibits good reverse isolation and an IP3 of -9.3dBm. The noise figure remains stable across different Vcc values, with a minimum of 3.3dB. The work demonstrates that modern CMOS processes are suitable for low noise applications above 1GHz, despite the presence of excess channel noise. The authors acknowledge the assistance of Albert Jerg, Ramin Farjad-Rad, Ken Yang, and Allen Chung-Li Lu.A 1.5V, 1.5GHz CMOS low noise amplifier (LNA) for a GPS receiver has been implemented in a 0.6 μm CMOS process. The LNA achieves a forward gain of 22dB with a noise figure of 3.5dB while drawing 30mW from a 1.5V supply. This represents the lowest noise figure reported for a CMOS amplifier operating above 1GHz. The design aims to minimize noise figure while maintaining reasonable power consumption. The input impedance is adjusted using inductive source degeneration and input tuning to achieve a narrow-band 50Ω impedance. The noise figure is calculated using an equivalent circuit model, considering contributions from various noise sources, including channel thermal noise. The noise figure is found to be independent of the intrinsic device transconductance, g_m1. The output noise current is influenced by the channel thermal noise, with the noise figure improving as the input device size is minimized. However, reducing g_d0 (zero-bias drain conductance) can degrade LNA linearity. Experimental results show a measured gain of 22dB and noise figure of 3.5dB at 30mW power dissipation. Spice simulations predict a noise figure of 1.7dB, implying a γ value of approximately 2.6. The amplifier also exhibits good reverse isolation and an IP3 of -9.3dBm. The noise figure remains stable across different Vcc values, with a minimum of 3.3dB. The work demonstrates that modern CMOS processes are suitable for low noise applications above 1GHz, despite the presence of excess channel noise. The authors acknowledge the assistance of Albert Jerg, Ramin Farjad-Rad, Ken Yang, and Allen Chung-Li Lu.