This paper proposes an ultra-high-current 48-V-to-1-V hybrid switched-capacitor (SC) voltage regulator, named the switching bus converter (SBC), for next-generation ultra-high-power processors. The proposed topology consists of two 2-to-1 SC front-ends and four 10-branch series-capacitor-buck (SCB) modules, merged through four switching buses. Compared to existing dc-bus-based architectures, the proposed switching-bus-based architecture eliminates the need for dc bus capacitors, reduces the switch count, and guarantees complete soft-charging operation. Through a topological comparison, this paper reveals that the proposed topology achieves the lowest normalized switch stress and the smallest normalized passive component volume among existing 48-V-to-1-V hybrid SC demonstrations, showing great potential for both higher efficiency and higher power density than prior hybrid SC solutions. A hardware prototype was designed and built with custom four-phase coupled inductors and gate drive daughterboards to validate the functionality and performance of the proposed switching bus converter. It was tested up to 1500-A output current and achieved 92.7% peak system efficiency, 85.7% full-load system efficiency (including gate drive loss), and 759 W/in³ power density (by box volume), pushing the performance limit of the state-of-the-art 48-V-to-1-V solutions towards higher efficiency and higher power density. The proposed topology merges two 2-to-1 SC front-ends with four 10-branch SCB modules through four switching buses, achieving a very large SC stage conversion ratio of 20-to-1. In contrast to the existing dc-bus-based architecture, the proposed switching-bus-based architecture eliminates the need for dc bus capacitors, reduces the switch count, and guarantees complete soft-charging operation. Furthermore, a topological comparison reveals that the proposed topology, when compared to existing 48-V-to-1-V hybrid SC demonstrations, achieves the lowest normalized switch stress and the smallest normalized passive component volume with the largest SC stage conversion ratio compared to existing 48-V-to-1-V hybrid SC demonstrations. This suggests that the proposed topology holds great promise for simultaneously achieving higher efficiency and power density than prior hybrid SC solutions. To validate the theoretical potential of the proposed topology, a hardware prototype with good modularity and extendability was designed and constructed with customized coupled magnetics and gate drive circuitry. A four-phase coupled inductor was optimized for a good trade-off between size and transient performance, with the range of duty ratio taken into consideration. In addition, an efficient, simple, and robust hybrid gate drive circuit was designed to overcome the accumulative diode voltage drops of conventional cascaded bootstrapping. This hybrid gate drive circuit powered the high-side switches in the SCB modules and was implemented as modular gate drive daughterboards. The hardware prototype was tested up to 1This paper proposes an ultra-high-current 48-V-to-1-V hybrid switched-capacitor (SC) voltage regulator, named the switching bus converter (SBC), for next-generation ultra-high-power processors. The proposed topology consists of two 2-to-1 SC front-ends and four 10-branch series-capacitor-buck (SCB) modules, merged through four switching buses. Compared to existing dc-bus-based architectures, the proposed switching-bus-based architecture eliminates the need for dc bus capacitors, reduces the switch count, and guarantees complete soft-charging operation. Through a topological comparison, this paper reveals that the proposed topology achieves the lowest normalized switch stress and the smallest normalized passive component volume among existing 48-V-to-1-V hybrid SC demonstrations, showing great potential for both higher efficiency and higher power density than prior hybrid SC solutions. A hardware prototype was designed and built with custom four-phase coupled inductors and gate drive daughterboards to validate the functionality and performance of the proposed switching bus converter. It was tested up to 1500-A output current and achieved 92.7% peak system efficiency, 85.7% full-load system efficiency (including gate drive loss), and 759 W/in³ power density (by box volume), pushing the performance limit of the state-of-the-art 48-V-to-1-V solutions towards higher efficiency and higher power density. The proposed topology merges two 2-to-1 SC front-ends with four 10-branch SCB modules through four switching buses, achieving a very large SC stage conversion ratio of 20-to-1. In contrast to the existing dc-bus-based architecture, the proposed switching-bus-based architecture eliminates the need for dc bus capacitors, reduces the switch count, and guarantees complete soft-charging operation. Furthermore, a topological comparison reveals that the proposed topology, when compared to existing 48-V-to-1-V hybrid SC demonstrations, achieves the lowest normalized switch stress and the smallest normalized passive component volume with the largest SC stage conversion ratio compared to existing 48-V-to-1-V hybrid SC demonstrations. This suggests that the proposed topology holds great promise for simultaneously achieving higher efficiency and power density than prior hybrid SC solutions. To validate the theoretical potential of the proposed topology, a hardware prototype with good modularity and extendability was designed and constructed with customized coupled magnetics and gate drive circuitry. A four-phase coupled inductor was optimized for a good trade-off between size and transient performance, with the range of duty ratio taken into consideration. In addition, an efficient, simple, and robust hybrid gate drive circuit was designed to overcome the accumulative diode voltage drops of conventional cascaded bootstrapping. This hybrid gate drive circuit powered the high-side switches in the SCB modules and was implemented as modular gate drive daughterboards. The hardware prototype was tested up to 1