This paper compares elliptic curve cryptography (ECC) and RSA on 8-bit microcontrollers. The authors implemented ECC point multiplication for 160-bit, 192-bit, and 224-bit NIST/SECG curves over GF(p) and RSA-1024 and RSA-2048 on two 8-bit microcontrollers: the 8051-based Chipcon CC1010 and the Atmel AVR ATmega128. They also proposed a new algorithm to reduce memory accesses during multiple-precision multiplication. The results show that public-key cryptography is viable on small devices without hardware acceleration. On the Atmel ATmega128 at 8 MHz, ECC point multiplication for 160-bit curves took 0.81 seconds, while RSA-1024 took 0.43 seconds with exponent e = 2^16 + 1. The performance advantage of ECC over RSA increases as the processor word size decreases and the key size increases. ECC over fields using pseudo-Mersenne primes as standardized by NIST and SECG allows for high performance implementations and shows no performance disadvantage over optimal extension fields or prime fields selected for a particular processor architecture. The paper discusses the implementation of ECC and RSA, focusing on optimizing modular multiplication and squaring for small processors. It presents three multiplication strategies: row-wise, column-wise, and hybrid. The hybrid strategy combines the advantages of both row-wise and column-wise multiplication, optimizing for both register usage and memory accesses. The authors also propose a new instruction called MULACC that reduces execution time for 160-bit multiplication by over 36% and for 528-bit Montgomery multiplication by 39%. The paper concludes that ECC point multiplication on small devices becomes comparable in performance to RSA public-key operations and is expected to be higher for large key sizes. The results show that ECC is more efficient than RSA on 8-bit processors, especially when using pseudo-Mersenne primes. The authors also note that field primes chosen specifically for a particular processor architecture or optimal extension fields do not lead to significant performance improvements over prime fields using pseudo-Mersenne primes as recommended by NIST and SECG.This paper compares elliptic curve cryptography (ECC) and RSA on 8-bit microcontrollers. The authors implemented ECC point multiplication for 160-bit, 192-bit, and 224-bit NIST/SECG curves over GF(p) and RSA-1024 and RSA-2048 on two 8-bit microcontrollers: the 8051-based Chipcon CC1010 and the Atmel AVR ATmega128. They also proposed a new algorithm to reduce memory accesses during multiple-precision multiplication. The results show that public-key cryptography is viable on small devices without hardware acceleration. On the Atmel ATmega128 at 8 MHz, ECC point multiplication for 160-bit curves took 0.81 seconds, while RSA-1024 took 0.43 seconds with exponent e = 2^16 + 1. The performance advantage of ECC over RSA increases as the processor word size decreases and the key size increases. ECC over fields using pseudo-Mersenne primes as standardized by NIST and SECG allows for high performance implementations and shows no performance disadvantage over optimal extension fields or prime fields selected for a particular processor architecture. The paper discusses the implementation of ECC and RSA, focusing on optimizing modular multiplication and squaring for small processors. It presents three multiplication strategies: row-wise, column-wise, and hybrid. The hybrid strategy combines the advantages of both row-wise and column-wise multiplication, optimizing for both register usage and memory accesses. The authors also propose a new instruction called MULACC that reduces execution time for 160-bit multiplication by over 36% and for 528-bit Montgomery multiplication by 39%. The paper concludes that ECC point multiplication on small devices becomes comparable in performance to RSA public-key operations and is expected to be higher for large key sizes. The results show that ECC is more efficient than RSA on 8-bit processors, especially when using pseudo-Mersenne primes. The authors also note that field primes chosen specifically for a particular processor architecture or optimal extension fields do not lead to significant performance improvements over prime fields using pseudo-Mersenne primes as recommended by NIST and SECG.