This paper presents a comprehensive methodology and a fully automated framework for exploring the impact of quantization on the reliability, accuracy, and hardware efficiency of systolic-array-based DNN accelerators. The framework integrates quantization-aware training, post-training quantization, fault simulation, and hardware implementation to measure key parameters such as area and latency. A novel lightweight protection technique is introduced to enhance the reliability of the final FPGA implementation. Experiments on the LeNet-5 and AlexNet benchmarks demonstrate the framework's effectiveness in analyzing the trade-offs between quantization levels, reliability, and hardware performance. The results show that while quantization can improve resilience, it also increases the vulnerability to faults in activations, particularly in lower precision networks. The proposed protection technique significantly reduces the reliability drop and fault criticality, with minimal hardware overhead. The study highlights the importance of comprehensive reliability assessments in DNN accelerators, especially for safety-critical applications.This paper presents a comprehensive methodology and a fully automated framework for exploring the impact of quantization on the reliability, accuracy, and hardware efficiency of systolic-array-based DNN accelerators. The framework integrates quantization-aware training, post-training quantization, fault simulation, and hardware implementation to measure key parameters such as area and latency. A novel lightweight protection technique is introduced to enhance the reliability of the final FPGA implementation. Experiments on the LeNet-5 and AlexNet benchmarks demonstrate the framework's effectiveness in analyzing the trade-offs between quantization levels, reliability, and hardware performance. The results show that while quantization can improve resilience, it also increases the vulnerability to faults in activations, particularly in lower precision networks. The proposed protection technique significantly reduces the reliability drop and fault criticality, with minimal hardware overhead. The study highlights the importance of comprehensive reliability assessments in DNN accelerators, especially for safety-critical applications.