This paper presents a novel bipolar field-effect tunneling transistor (FET) based on vertical graphene heterostructures, utilizing the low density of states and atomic thickness of graphene. The device features atomically thin boron nitride (hBN) as a tunnel barrier, achieving room temperature switching ratios of approximately 50, which can be further enhanced. The performance of graphene-based FETs has been limited by metallic conductivity at the neutrality point and unimpeded electron transport through potential barriers, leading to low ON-OFF switching ratios. The proposed architecture overcomes these limitations by exploiting quantum tunneling through the hBN barrier. The operation of the device is based on the voltage tunability of the tunneling density of states (DoS) in graphene and the effective height of the tunnel barrier. The structure includes a multiterminal Hall bar geometry for graphene electrodes, allowing measurement of tunnel current-voltage curves and additional information about transistor operation. The fabrication process involves transferring monolayer graphene onto hBN crystals, depositing metal contacts, and annealing. The results show that the tunnel current is significantly enhanced by gate voltage, with an asymmetric response due to the lower barrier height for holes compared to electrons. The analysis suggests that higher ON-OFF ratios can be achieved by using higher gate voltages or devices with larger tunnel barrier thicknesses, though electrical breakdown limits the former approach. The study concludes that the demonstrated devices offer a viable route for high-speed graphene-based analogue electronics, with potential for large-scale integration.This paper presents a novel bipolar field-effect tunneling transistor (FET) based on vertical graphene heterostructures, utilizing the low density of states and atomic thickness of graphene. The device features atomically thin boron nitride (hBN) as a tunnel barrier, achieving room temperature switching ratios of approximately 50, which can be further enhanced. The performance of graphene-based FETs has been limited by metallic conductivity at the neutrality point and unimpeded electron transport through potential barriers, leading to low ON-OFF switching ratios. The proposed architecture overcomes these limitations by exploiting quantum tunneling through the hBN barrier. The operation of the device is based on the voltage tunability of the tunneling density of states (DoS) in graphene and the effective height of the tunnel barrier. The structure includes a multiterminal Hall bar geometry for graphene electrodes, allowing measurement of tunnel current-voltage curves and additional information about transistor operation. The fabrication process involves transferring monolayer graphene onto hBN crystals, depositing metal contacts, and annealing. The results show that the tunnel current is significantly enhanced by gate voltage, with an asymmetric response due to the lower barrier height for holes compared to electrons. The analysis suggests that higher ON-OFF ratios can be achieved by using higher gate voltages or devices with larger tunnel barrier thicknesses, though electrical breakdown limits the former approach. The study concludes that the demonstrated devices offer a viable route for high-speed graphene-based analogue electronics, with potential for large-scale integration.