Inverse design and demonstration of a compact and broadband on-chip wavelength demultiplexer

Inverse design and demonstration of a compact and broadband on-chip wavelength demultiplexer

1 Apr 2015 | Alexander Y. Piggott, Jesse Lu, Konstantinos G. Lagoudakis, Jan Petykiewicz, Thomas M. Babinec, and Jelena Vučković
This paper presents the design and demonstration of a compact and broadband on-chip wavelength demultiplexer using an inverse design method. The authors, from Stanford University, describe a silicon-based device that splits 1300 nm and 1550 nm light from an input waveguide into two output waveguides. The device is fabricated on a silicon-on-insulator (SOI) platform and characterized for low insertion loss (2-4 dB), high contrast (12-17 dB), and wide bandwidths (∼100 nm). The footprint of the device is 2.8 × 2.8 μm, making it the smallest dielectric wavelength splitter to date. The inverse design algorithm, which explores the full design space of fabricable devices, allows for the creation of devices with previously unattainable functionality, higher performance, and smaller footprints compared to conventional devices. The paper also details the optimization process, fabrication methods, and measurement techniques used to achieve these results.This paper presents the design and demonstration of a compact and broadband on-chip wavelength demultiplexer using an inverse design method. The authors, from Stanford University, describe a silicon-based device that splits 1300 nm and 1550 nm light from an input waveguide into two output waveguides. The device is fabricated on a silicon-on-insulator (SOI) platform and characterized for low insertion loss (2-4 dB), high contrast (12-17 dB), and wide bandwidths (∼100 nm). The footprint of the device is 2.8 × 2.8 μm, making it the smallest dielectric wavelength splitter to date. The inverse design algorithm, which explores the full design space of fabricable devices, allows for the creation of devices with previously unattainable functionality, higher performance, and smaller footprints compared to conventional devices. The paper also details the optimization process, fabrication methods, and measurement techniques used to achieve these results.
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