The paper presents a novel approach to reduce the overhead of fault-tolerant quantum computing (FTQC) by combining quantum low-density parity-check (qLDPC) codes with bosonic cat qubits. The authors propose an architecture based on cat qubits concatenated in classical LDPC codes that correct phase-flip errors. This approach offers two main advantages: it can be implemented using short-range qubit interactions and low-weight stabilizers, making it compatible with current superconducting circuit technologies, and it enables the implementation of a universal set of fault-tolerant logical gates with a second layer of cat qubits while maintaining local connectivity. The authors conduct numerical optimization to find classical codes with high encoding rates for algorithmically relevant code distances. They discover that some of the best codes benefit from a cellular automaton structure, which allows for the definition of families of codes with high encoding rates and distances. The performance of these codes under circuit-level noise is also assessed, showing that the $[165 + 8\ell, 34 + 2\ell, 22]$ code family can encode 100 logical qubits with a total logical error probability (including both logical phase-flip and bit-flip) per cycle and per logical qubit $\epsilon_L \leq 10^{-8}$ on a 758 cat qubit chip. The paper also discusses the fault-tolerant implementation of a universal set of logical gates using a two-layer architecture, where the lower layer contains logical qubits encoded in high-rate local phase-flip codes, and the upper layer contains ancillary logical qubits encoded in repetition codes. This architecture can be realized with existing technologies, demonstrating the feasibility of the proposed approach for practical quantum computing applications.The paper presents a novel approach to reduce the overhead of fault-tolerant quantum computing (FTQC) by combining quantum low-density parity-check (qLDPC) codes with bosonic cat qubits. The authors propose an architecture based on cat qubits concatenated in classical LDPC codes that correct phase-flip errors. This approach offers two main advantages: it can be implemented using short-range qubit interactions and low-weight stabilizers, making it compatible with current superconducting circuit technologies, and it enables the implementation of a universal set of fault-tolerant logical gates with a second layer of cat qubits while maintaining local connectivity. The authors conduct numerical optimization to find classical codes with high encoding rates for algorithmically relevant code distances. They discover that some of the best codes benefit from a cellular automaton structure, which allows for the definition of families of codes with high encoding rates and distances. The performance of these codes under circuit-level noise is also assessed, showing that the $[165 + 8\ell, 34 + 2\ell, 22]$ code family can encode 100 logical qubits with a total logical error probability (including both logical phase-flip and bit-flip) per cycle and per logical qubit $\epsilon_L \leq 10^{-8}$ on a 758 cat qubit chip. The paper also discusses the fault-tolerant implementation of a universal set of logical gates using a two-layer architecture, where the lower layer contains logical qubits encoded in high-rate local phase-flip codes, and the upper layer contains ancillary logical qubits encoded in repetition codes. This architecture can be realized with existing technologies, demonstrating the feasibility of the proposed approach for practical quantum computing applications.