Researchers demonstrate logic circuits using single-walled carbon nanotube field-effect transistors (FETs). The devices feature local gates that enable strong electrostatic doping, allowing for both p- and n-doping and the study of charge screening in one-dimensional nanotubes. The transistors exhibit high gain (>10), large on-off ratio (>10^5), and room-temperature operation. The local-gate layout allows integration of multiple devices on a single chip, enabling the demonstration of 1-, 2-, and 3-transistor circuits that perform various digital logic operations, including inverters, NOR gates, static random-access memory (SRAM) cells, and ring oscillators. The study highlights the potential of carbon nanotube FETs for nanoelectronics, with the ability to achieve strong doping and study unique nanotube physics. The nanotube transistors use a local gate insulated by a few nanometers of oxide, allowing for excellent capacitive coupling. The device layout enables the integration of multiple transistors on a single chip, with each gate addressing a different nanotube transistor. The nanotube circuits are fabricated in three steps: patterning Al gates, dispersing nanotubes, and fabricating contact electrodes. The transistors show strong doping, with the current varying significantly with gate voltage, indicating changes in the Fermi level. The transistors are classified as enhancement-mode p-type FETs, with a transconductance of 0.3 μS and an on/off ratio of at least 10^5. The study demonstrates the feasibility of using nanotube FETs for digital logic circuits, with a large gain (>10) and output swing of over 1 V. The circuits include an inverter, a NOR gate, an SRAM cell, and a ring oscillator. The SRAM cell demonstrates stable memory function, maintaining logical states even after the input switch is opened. The ring oscillator generates an oscillating AC voltage signal with a frequency determined by the resistance and capacitance of the inverters. The research also explores the unique physics of carbon nanotubes, including charge distribution and screening effects. The study shows that the charge distribution in nanotubes varies over a long spatial range, which could be minimized by tuning parameters such as the work function difference between the nanotube and electrode. The results indicate the potential of carbon nanotube-based logic circuits for future nanoelectronics, with promising prospects for further development.Researchers demonstrate logic circuits using single-walled carbon nanotube field-effect transistors (FETs). The devices feature local gates that enable strong electrostatic doping, allowing for both p- and n-doping and the study of charge screening in one-dimensional nanotubes. The transistors exhibit high gain (>10), large on-off ratio (>10^5), and room-temperature operation. The local-gate layout allows integration of multiple devices on a single chip, enabling the demonstration of 1-, 2-, and 3-transistor circuits that perform various digital logic operations, including inverters, NOR gates, static random-access memory (SRAM) cells, and ring oscillators. The study highlights the potential of carbon nanotube FETs for nanoelectronics, with the ability to achieve strong doping and study unique nanotube physics. The nanotube transistors use a local gate insulated by a few nanometers of oxide, allowing for excellent capacitive coupling. The device layout enables the integration of multiple transistors on a single chip, with each gate addressing a different nanotube transistor. The nanotube circuits are fabricated in three steps: patterning Al gates, dispersing nanotubes, and fabricating contact electrodes. The transistors show strong doping, with the current varying significantly with gate voltage, indicating changes in the Fermi level. The transistors are classified as enhancement-mode p-type FETs, with a transconductance of 0.3 μS and an on/off ratio of at least 10^5. The study demonstrates the feasibility of using nanotube FETs for digital logic circuits, with a large gain (>10) and output swing of over 1 V. The circuits include an inverter, a NOR gate, an SRAM cell, and a ring oscillator. The SRAM cell demonstrates stable memory function, maintaining logical states even after the input switch is opened. The ring oscillator generates an oscillating AC voltage signal with a frequency determined by the resistance and capacitance of the inverters. The research also explores the unique physics of carbon nanotubes, including charge distribution and screening effects. The study shows that the charge distribution in nanotubes varies over a long spatial range, which could be minimized by tuning parameters such as the work function difference between the nanotube and electrode. The results indicate the potential of carbon nanotube-based logic circuits for future nanoelectronics, with promising prospects for further development.