The paper reports the fabrication and accurate measurement of propagation and bending losses in single-mode silicon-on-insulator (SOI) strip waveguides with submicron dimensions. Using a standard 200mm CMOS fabrication line, the authors achieved minimal propagation losses of 3.6 ± 0.1 dB/cm for the TE polarization at 1.5 μm wavelength. Bending losses were measured to be 0.086 ± 0.005 dB/90° bend for a 1 μm radius and as low as 0.013 ± 0.005 dB/90° bend for a 2 μm radius. These low losses are significant for the development of silicon microphotonics components and circuits. The waveguides were fabricated on SOI wafers with a 220 nm thick silicon layer and a 2 μm buried oxide layer. A 50 nm oxide layer was used as a hard mask for etching. The waveguides were defined by etching two parallel 2 μm wide slots in the silicon layer. The resulting waveguide with a core cross-section of 445x220 nm can support a single TE mode in the 1350-1750 nm wavelength range. Propagation losses were measured using the cut-back method, where the transmission through waveguides of varying lengths was compared. The results showed that the propagation loss for the TE mode was 3.6 ± 0.1 dB/cm at 1500 nm and 6.8 ± 0.2 dB/cm at 1300 nm. The TM mode showed losses of 3.5 ± 0.1 dB/cm. The loss spectrum was found to be relatively flat around 1500 nm, with minimal losses around 1450-1500 nm. Bending losses were measured for waveguides with radii of 5, 2, and 1 μm. The bending loss for the TE mode was found to be 0.086 ± 0.005 dB/90° bend for a 1 μm radius and 0.013 ± 0.005 dB/90° bend for a 2 μm radius. The results show that the bending losses are very low, even smaller than those in bends using compact resonant structures. The low bending losses are attributed to the high mode confinement in the SOI waveguides. The authors conclude that the measured losses are useful as a benchmark for further development of silicon microphotonics components and circuits on the SOI platform. Further optimization of the processing, such as oxidation smoothing of the sidewalls and optimization of the bend design, may allow losses to be reduced further.The paper reports the fabrication and accurate measurement of propagation and bending losses in single-mode silicon-on-insulator (SOI) strip waveguides with submicron dimensions. Using a standard 200mm CMOS fabrication line, the authors achieved minimal propagation losses of 3.6 ± 0.1 dB/cm for the TE polarization at 1.5 μm wavelength. Bending losses were measured to be 0.086 ± 0.005 dB/90° bend for a 1 μm radius and as low as 0.013 ± 0.005 dB/90° bend for a 2 μm radius. These low losses are significant for the development of silicon microphotonics components and circuits. The waveguides were fabricated on SOI wafers with a 220 nm thick silicon layer and a 2 μm buried oxide layer. A 50 nm oxide layer was used as a hard mask for etching. The waveguides were defined by etching two parallel 2 μm wide slots in the silicon layer. The resulting waveguide with a core cross-section of 445x220 nm can support a single TE mode in the 1350-1750 nm wavelength range. Propagation losses were measured using the cut-back method, where the transmission through waveguides of varying lengths was compared. The results showed that the propagation loss for the TE mode was 3.6 ± 0.1 dB/cm at 1500 nm and 6.8 ± 0.2 dB/cm at 1300 nm. The TM mode showed losses of 3.5 ± 0.1 dB/cm. The loss spectrum was found to be relatively flat around 1500 nm, with minimal losses around 1450-1500 nm. Bending losses were measured for waveguides with radii of 5, 2, and 1 μm. The bending loss for the TE mode was found to be 0.086 ± 0.005 dB/90° bend for a 1 μm radius and 0.013 ± 0.005 dB/90° bend for a 2 μm radius. The results show that the bending losses are very low, even smaller than those in bends using compact resonant structures. The low bending losses are attributed to the high mode confinement in the SOI waveguides. The authors conclude that the measured losses are useful as a benchmark for further development of silicon microphotonics components and circuits on the SOI platform. Further optimization of the processing, such as oxidation smoothing of the sidewalls and optimization of the bend design, may allow losses to be reduced further.