Practical Implementation of Robust State-Space Obfuscation for Hardware IP Protection

Practical Implementation of Robust State-Space Obfuscation for Hardware IP Protection

February 2024 | Md Moshiur Rahman, Member, IEEE, and Swarup Bhunia, Senior Member, IEEE
This paper presents a practical state-space obfuscation algorithm and associated automation tool, ProtectIP, to address the shortcomings of existing hardware obfuscation techniques. The algorithm increases the reachable state space of an IP exponentially by inserting nonfunctional states in the FSM, making it robust against state-space enumeration and structural analysis attacks. The algorithm has polynomial complexity and is scalable for large designs. ProtectIP is integrated into a commercial EDA tool flow and achieves exponential resistance against known RE attacks with modest area overhead (24% on average) and negligible impact on critical-path delay (max 5% overhead). The security level is quantified using metrics, showing that an intelligent attacker with partial knowledge of the obfuscation process has a minimal success rate (0.33) in RE attacks. The methodology is scalable, amenable to automation, and integrates with existing EDA flows. It introduces three security metrics to quantify the level of improved RE complexity under different threat models. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks. The methodology increases the reachable state space of the FSM by inserting nonfunctional states, making it difficult for attackers to reverse engineer the FSM. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks. The methodology is scalable, amenable to automation, and integrates with existing EDA flows. It introduces three security metrics to quantify the level of improved RE complexity under different threat models. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks. The methodology is scalable, amenable to automation, and integrates with existing EDA flows. It introduces three security metrics to quantify the level of improved RE complexity under different threat models. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks.This paper presents a practical state-space obfuscation algorithm and associated automation tool, ProtectIP, to address the shortcomings of existing hardware obfuscation techniques. The algorithm increases the reachable state space of an IP exponentially by inserting nonfunctional states in the FSM, making it robust against state-space enumeration and structural analysis attacks. The algorithm has polynomial complexity and is scalable for large designs. ProtectIP is integrated into a commercial EDA tool flow and achieves exponential resistance against known RE attacks with modest area overhead (24% on average) and negligible impact on critical-path delay (max 5% overhead). The security level is quantified using metrics, showing that an intelligent attacker with partial knowledge of the obfuscation process has a minimal success rate (0.33) in RE attacks. The methodology is scalable, amenable to automation, and integrates with existing EDA flows. It introduces three security metrics to quantify the level of improved RE complexity under different threat models. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks. The methodology increases the reachable state space of the FSM by inserting nonfunctional states, making it difficult for attackers to reverse engineer the FSM. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks. The methodology is scalable, amenable to automation, and integrates with existing EDA flows. It introduces three security metrics to quantify the level of improved RE complexity under different threat models. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks. The methodology is scalable, amenable to automation, and integrates with existing EDA flows. It introduces three security metrics to quantify the level of improved RE complexity under different threat models. The algorithm is implemented in a CAD tool, ProtectIP, which is integrated into the commercial EDA flow. The tool is evaluated against several known attacks on large-scale IP blocks, demonstrating robustness against structural analysis attacks.
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