Reconfigurable computing, which combines the performance benefits of hardware with the flexibility of software, has gained significant attention due to its potential to accelerate various applications. This survey by Katherine Compton and Scott Hauck explores the hardware and software aspects of reconfigurable computing systems, including single-chip architectures, multi-chip systems, and run-time reconfiguration techniques. The authors discuss the key features of reconfigurable devices, such as field-programmable gate arrays (FPGAs), and the compilation tools that map high-level algorithms to these devices. They also delve into the internal structures and external coupling of reconfigurable systems, highlighting the trade-offs between manual and automated compilation processes. The survey covers a range of applications that benefit from reconfigurable computing, such as data encryption, sieving for factoring large numbers, and various computational tasks. Additionally, it examines the coupling of reconfigurable hardware with traditional microprocessors, the design of logic blocks, and the importance of routing resources in achieving efficient performance. The article concludes with a discussion on one-dimensional structures and multi-FPGA systems, emphasizing the need for efficient connection schemes in multi-chip reconfigurable systems.Reconfigurable computing, which combines the performance benefits of hardware with the flexibility of software, has gained significant attention due to its potential to accelerate various applications. This survey by Katherine Compton and Scott Hauck explores the hardware and software aspects of reconfigurable computing systems, including single-chip architectures, multi-chip systems, and run-time reconfiguration techniques. The authors discuss the key features of reconfigurable devices, such as field-programmable gate arrays (FPGAs), and the compilation tools that map high-level algorithms to these devices. They also delve into the internal structures and external coupling of reconfigurable systems, highlighting the trade-offs between manual and automated compilation processes. The survey covers a range of applications that benefit from reconfigurable computing, such as data encryption, sieving for factoring large numbers, and various computational tasks. Additionally, it examines the coupling of reconfigurable hardware with traditional microprocessors, the design of logic blocks, and the importance of routing resources in achieving efficient performance. The article concludes with a discussion on one-dimensional structures and multi-FPGA systems, emphasizing the need for efficient connection schemes in multi-chip reconfigurable systems.