This study presents the experimental realization of robust quantum gates in superconducting quantum circuits that are resilient to correlated noise. The approach is based on a geometric framework for diagnosing and correcting various gate errors. Using quantum process tomography and randomized benchmarking, the researchers demonstrate robust single-qubit gates against quasi-static noise and spatially correlated noise in a broad range of strengths, which are common sources of coherent errors in large-scale quantum circuits. They also apply their method to non-static noises and realize robust two-qubit gates. The work provides a versatile toolbox for achieving noise-resilient complex quantum circuits. Quantum gates are typically benchmarked in isolation under pristine conditions to obtain high fidelities surpassing fault-tolerance thresholds of quantum error correction (QEC) codes. However, when deployed in large-scale quantum circuits, additional noise channels emerge, leading to errors that are absent or negligible in the isolated gate setting. These noises arise from effects like crosstalk, control imperfection, and correlated noise, leading to complex errors that are difficult to benchmark in isolation. Consequently, the gate fidelity measured under well-controlled conditions fails to faithfully predict performance in real circuits. To overcome this challenge, the researchers need to rigorously evaluate the gate robustness against pertinent error models beyond isolated fidelity. Robust gates exhibit built-in noise resilience through careful pulse shaping, making them well-suited for constructing complex quantum algorithms. In particular, they help correct coherent errors of significant spatiotemporal correlations, which are known to pose great challenges for QEC. Recently, a geometric technique has been developed to design smooth and short-duration robust control pulses (RCPs) that suppress errors from general noise processes in multiple directions. The RCPs are constructed by mapping the noisy quantum evolution onto error curves in a parameter space. The topology of these curves, such as their closeness, directly determines the gate robustness, while the local geometric properties like curvature and torsion are linked to parameters of the control Hamiltonian. This framework provides both an intuitive picture of noisy quantum evolution and a systematic tool for RCP optimization. In this work, the researchers experimentally demonstrate robust quantum gates based on the above RCPs using superconducting quantum circuits. After a concise introduction to the design principles, they report experimental results on quantum gates that are much more fault-tolerant against coherent errors resulting from generic noises with components in multiple directions than conventional dynamical gates. More importantly, they find that their gates significantly suppress the pernicious buildup of coherent errors in long circuits subjected to temporally correlated noise, leading to substantially enhanced overall circuit performance and worst-case fidelity, which may benefit fault-tolerant QEC.This study presents the experimental realization of robust quantum gates in superconducting quantum circuits that are resilient to correlated noise. The approach is based on a geometric framework for diagnosing and correcting various gate errors. Using quantum process tomography and randomized benchmarking, the researchers demonstrate robust single-qubit gates against quasi-static noise and spatially correlated noise in a broad range of strengths, which are common sources of coherent errors in large-scale quantum circuits. They also apply their method to non-static noises and realize robust two-qubit gates. The work provides a versatile toolbox for achieving noise-resilient complex quantum circuits. Quantum gates are typically benchmarked in isolation under pristine conditions to obtain high fidelities surpassing fault-tolerance thresholds of quantum error correction (QEC) codes. However, when deployed in large-scale quantum circuits, additional noise channels emerge, leading to errors that are absent or negligible in the isolated gate setting. These noises arise from effects like crosstalk, control imperfection, and correlated noise, leading to complex errors that are difficult to benchmark in isolation. Consequently, the gate fidelity measured under well-controlled conditions fails to faithfully predict performance in real circuits. To overcome this challenge, the researchers need to rigorously evaluate the gate robustness against pertinent error models beyond isolated fidelity. Robust gates exhibit built-in noise resilience through careful pulse shaping, making them well-suited for constructing complex quantum algorithms. In particular, they help correct coherent errors of significant spatiotemporal correlations, which are known to pose great challenges for QEC. Recently, a geometric technique has been developed to design smooth and short-duration robust control pulses (RCPs) that suppress errors from general noise processes in multiple directions. The RCPs are constructed by mapping the noisy quantum evolution onto error curves in a parameter space. The topology of these curves, such as their closeness, directly determines the gate robustness, while the local geometric properties like curvature and torsion are linked to parameters of the control Hamiltonian. This framework provides both an intuitive picture of noisy quantum evolution and a systematic tool for RCP optimization. In this work, the researchers experimentally demonstrate robust quantum gates based on the above RCPs using superconducting quantum circuits. After a concise introduction to the design principles, they report experimental results on quantum gates that are much more fault-tolerant against coherent errors resulting from generic noises with components in multiple directions than conventional dynamical gates. More importantly, they find that their gates significantly suppress the pernicious buildup of coherent errors in long circuits subjected to temporally correlated noise, leading to substantially enhanced overall circuit performance and worst-case fidelity, which may benefit fault-tolerant QEC.