Telos: Enabling Ultra-Low Power Wireless Research

Telos: Enabling Ultra-Low Power Wireless Research

2004 | Joseph Polastre, Robert Szewczyk, and David Culler
Telos is an ultra-low power wireless sensor module designed for research and experimentation. Developed by UC Berkeley, it is the latest in a series of mote platforms aimed at advancing wireless sensor network (WSN) research. Telos is built from scratch, incorporating lessons from previous mote generations. Its design focuses on three key goals: minimal power consumption, ease of use, and increased software and hardware robustness. The mote uses a Texas Instruments MSP430 microcontroller, a Chipcon IEEE 802.15.4-compliant radio, and USB, resulting in a power profile nearly one-tenth that of previous platforms while offering improved performance and throughput. It eliminates the need for programming and support boards, enabling experimentation in lab, testbed, and deployment settings. Telos is designed with a low duty cycle principle, where the node is mostly asleep, wakes up quickly on an event, processes, and returns to sleep. This minimizes standby current and wake-up time, crucial for low power operation. The integrated design of Telos allows researchers to utilize more functionality and develop more robust systems. It uses a 2.4GHz Planar Inverted Folded Antenna (PIFA) and integrates programming, computation, communication, and sensing onto a single device, enhancing robustness and ease of use. Telos uses a hardware write-protection feature for external storage, ensuring a fallback mechanism for reprogrammable systems. Each hardware sub-circuit is isolated, allowing independent power control, which increases system robustness. The mote includes a 48-bit silicon serial identification chip, providing a unique 64-bit MAC address for system and network diagnostics. Telos features a lower power flash and microcontroller compared to Mica2 and MicaZ, with a power consumption of 3μA in sleep mode. It offers a lower duty cycle and longer lifetime, lasting almost 3 years at a 1% duty cycle. The mote includes a DMA controller, which allows applications to sample from the ADC, output a voltage on the DAC, or transfer data to and from the radio without interrupting the MCU. This improves performance and reduces power consumption. Telos supports the IEEE 802.15.4 standard, enabling communication with devices from other vendors. It provides features such as packet success rate, link quality indicator (LQI), and received signal strength (RSSI), which are useful for network services like multihop networking and localization. Telos also lowers the barrier for using WSNs by enabling USB-based interfaces, making it suitable for lab, testbed, and deployment settings. The software implications of Telos include a three-tier architecture for hardware abstraction, allowing the full power of the MSP430 microcontroller to be used. Telos supports cross-platform communication and research on hybrid networks. The design of Telos enables researchers to experiment with the new IEEE 802.15.4 standardTelos is an ultra-low power wireless sensor module designed for research and experimentation. Developed by UC Berkeley, it is the latest in a series of mote platforms aimed at advancing wireless sensor network (WSN) research. Telos is built from scratch, incorporating lessons from previous mote generations. Its design focuses on three key goals: minimal power consumption, ease of use, and increased software and hardware robustness. The mote uses a Texas Instruments MSP430 microcontroller, a Chipcon IEEE 802.15.4-compliant radio, and USB, resulting in a power profile nearly one-tenth that of previous platforms while offering improved performance and throughput. It eliminates the need for programming and support boards, enabling experimentation in lab, testbed, and deployment settings. Telos is designed with a low duty cycle principle, where the node is mostly asleep, wakes up quickly on an event, processes, and returns to sleep. This minimizes standby current and wake-up time, crucial for low power operation. The integrated design of Telos allows researchers to utilize more functionality and develop more robust systems. It uses a 2.4GHz Planar Inverted Folded Antenna (PIFA) and integrates programming, computation, communication, and sensing onto a single device, enhancing robustness and ease of use. Telos uses a hardware write-protection feature for external storage, ensuring a fallback mechanism for reprogrammable systems. Each hardware sub-circuit is isolated, allowing independent power control, which increases system robustness. The mote includes a 48-bit silicon serial identification chip, providing a unique 64-bit MAC address for system and network diagnostics. Telos features a lower power flash and microcontroller compared to Mica2 and MicaZ, with a power consumption of 3μA in sleep mode. It offers a lower duty cycle and longer lifetime, lasting almost 3 years at a 1% duty cycle. The mote includes a DMA controller, which allows applications to sample from the ADC, output a voltage on the DAC, or transfer data to and from the radio without interrupting the MCU. This improves performance and reduces power consumption. Telos supports the IEEE 802.15.4 standard, enabling communication with devices from other vendors. It provides features such as packet success rate, link quality indicator (LQI), and received signal strength (RSSI), which are useful for network services like multihop networking and localization. Telos also lowers the barrier for using WSNs by enabling USB-based interfaces, making it suitable for lab, testbed, and deployment settings. The software implications of Telos include a three-tier architecture for hardware abstraction, allowing the full power of the MSP430 microcontroller to be used. Telos supports cross-platform communication and research on hybrid networks. The design of Telos enables researchers to experiment with the new IEEE 802.15.4 standard
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Understanding Telos%3A enabling ultra-low power wireless research