This paper presents a scientific approach to counteract power-analysis attacks by modeling the physical characteristics of devices and designing implementations that are provably secure against such attacks. The authors propose an abstract model for power consumption in devices, particularly small single-chip devices, and use it to develop a generic technique for creating implementations resistant to statistical attacks. They prove a lower bound on the number of experiments required to mount statistical attacks on devices with reasonable physical properties. Power analysis attacks exploit the correlation between the power consumption of a device and the internal state of the computation. These attacks can be mounted by distinguishing statistical distributions of power consumption based on the relevant state of the device. The authors analyze the effectiveness of various countermeasures, including ad-hoc approaches such as balancing and randomizing execution sequences, which are shown to be vulnerable to signal processing techniques. The authors propose a general countermeasure based on secret sharing schemes, where each bit of the original computation is split into probabilistic shares such that any subset of shares is statistically independent of the original bit. This approach ensures that the adversary cannot determine the original bit from the shares, as the shares are statistically independent. The computation is performed using only the random shares, with intermediate steps computing only the shares of the result. The authors analyze the effectiveness of this technique by making realistic assumptions about the power consumption model and proving lower bounds on the number of samples required to distinguish distributions. They show that the amount of side channel information required grows exponentially with the number of shares. The results are applied to both bit and byte encoding schemes, with the latter being more practical for real-world applications. The paper concludes that further research is needed to develop more effective and general countermeasures against power-analysis attacks. The proposed framework provides a foundation for formal analysis of computing in the presence of leaked side channel information and can be used to design secure and efficient cryptographic primitives.This paper presents a scientific approach to counteract power-analysis attacks by modeling the physical characteristics of devices and designing implementations that are provably secure against such attacks. The authors propose an abstract model for power consumption in devices, particularly small single-chip devices, and use it to develop a generic technique for creating implementations resistant to statistical attacks. They prove a lower bound on the number of experiments required to mount statistical attacks on devices with reasonable physical properties. Power analysis attacks exploit the correlation between the power consumption of a device and the internal state of the computation. These attacks can be mounted by distinguishing statistical distributions of power consumption based on the relevant state of the device. The authors analyze the effectiveness of various countermeasures, including ad-hoc approaches such as balancing and randomizing execution sequences, which are shown to be vulnerable to signal processing techniques. The authors propose a general countermeasure based on secret sharing schemes, where each bit of the original computation is split into probabilistic shares such that any subset of shares is statistically independent of the original bit. This approach ensures that the adversary cannot determine the original bit from the shares, as the shares are statistically independent. The computation is performed using only the random shares, with intermediate steps computing only the shares of the result. The authors analyze the effectiveness of this technique by making realistic assumptions about the power consumption model and proving lower bounds on the number of samples required to distinguish distributions. They show that the amount of side channel information required grows exponentially with the number of shares. The results are applied to both bit and byte encoding schemes, with the latter being more practical for real-world applications. The paper concludes that further research is needed to develop more effective and general countermeasures against power-analysis attacks. The proposed framework provides a foundation for formal analysis of computing in the presence of leaked side channel information and can be used to design secure and efficient cryptographic primitives.